Maximum Bandwidth – Samsung unveils zHBM memory with 8x HBM5 performance
Samsung unveils its next-generation zHBM and zNAND-O memory technologies
At FMS 2026, Samsung has unveiled two new memory concepts that could change the way devices are made. While Samsung’s memory roadmap already covers HBM4, HBM4E, and HBM5, Samsung believes that HBM’s next step will move it in a new direction. With zHBM, Samsung believes that it can create chips that are 8x faster than HBM5, delivering obscene levels of bandwidth to users.
Instead of sitting alongside other chips, zHBM stacks above processors to deliver increased bandwidth and improved power efficiency. This enables the development of faster AI accelerators. Additionally, zHBM could deliver up to 10x the memory density of HBM5. In other words, zHBM is faster, more power-efficient, higher-capacity, and more spatially efficient.
zHBM currently has no release schedule or confirmed products. As it stands, zHBM is a modelled concept. There’s a reason why zHBM is being compared with HBM5. It will be years before zHBM could become a reality.
At FMS 2026, Samsung unveiled the industry’s first concept models of zHBM and zNAND-O, presenting its vision for the next generation of 3D memory architectures.
Designed for advanced AI computing, zHBM presents a new memory architecture that vertically stacks HBM directly above AI accelerators, moving beyond conventional designs in which HBM is positioned alongside the processor.
By minimizing the distance that data travels between the AI processor and memory, zHBM is designed to deliver higher bandwidth and improved power efficiency, enabling the ultra-fast data processing required for large-scale AI training and inference.
A next-generation interface system incorporating zHBM is expected to deliver approximately eight times the performance of HBM5. With next-generation wafer bonding technology, zHBM can achieve more than 10 times the memory density of HBM5 while enhancing energy efficiency threefold and reducing thermal resistance by more than half, maximizing the stability and power efficiency of high-capacity, high-bandwidth systems.
zHBM also supports customer-specific designs, enabling customized IP to be integrated into the interlayer between the memory and AI accelerator to expand memory capacity and enhance accelerator performance.
Building on close collaboration with customers, Samsung plans to further optimize the integration of AI processors and memory through zHBM to maximize AI system performance.
Meet zNAND-O
Alongside zHBM, Samsung has unveiled zNAND-O, a 4-8 layer vertical NAND solution that aims to deliver boosted I/O performance, lower latencies, and higher capacities. This memory is designed to sit between standard NAND memory and DRAM in terms of bandwidth and latency, making it a useful memory type for edge AI environments.
The company also introduced zNAND-O, a next-generation high-performance NAND solution built on its V-NAND technology and in development in four- and eight-layer versions. By combining high space efficiency, improved I/O performance and low latency, zNAND-O is optimized for edge AI environments supporting real-time, data-intensive AI applications.
Samsung is clearly focused on delivering faster memory solutions for datacenter customers. Samsung is pushing bandwidth to higher levels to enable the creation of faster and faster hardware. Sadly, these new memory types will not be of much interest to consumers. While regular people would prefer increased DDR5 wafer productivity and faster manufacturing speeds, enterprise customers (where the real money is) want faster, more efficient hardware.
You can join the discussion on Samsung’s planned zHBM and zNAND-O tech on the OC3D Forums.
