Intel shows of x86 CPU with big.LITTLE core design

Intel shows of x86 CPU with big.LITTLE core design

Intel shows of x86 CPU with big.LITTLE core design

When it comes to designing processors, we are entering into an era designs have to get smart or risk falling behind. Pushing more transistors into smaller pieces of silicon is getting more difficult with every new process node, so much so that fewer and fewer companies are investing in leading-edge silicon lithography with every generation. Globalfoundries is the latest company to drop out of the race, with 7nm being a step too far for the company financially.

Over the next couple of generations, CPU and CPU manufacturers need to make creative use of their silicon to succeed, with AMD’s Chiplet approach to their Zen 2-based EPYC process acting as a prime example, overcoming the difficulties of large-die processors by separating their products into modular chiplets, delivering a high-performance final product with lower-cost, high-yield silicon. 

At their architecture day earlier this week, Intel showcased their Fovoros SoC, a 3D design that utilises 22FFL silicon alongside new 10nm chips, not only employing a twist on the chiplets concept but also a novel idea that comes directly from the mobile CPU market. 

This idea is known as big.LITTLE, a concept that was pioneered by ARM with their mobile processors that pairs high-performance processing cores with lower-performance high-efficiency cores to deliver high-performance levels and low power consumption when required. At the Intel architecture day, Anandtech got a look at the block diagram for their Hybrid x86 SoC, which utilised 3D Forvoros technology. 

This processor uses a single “Big CPU” (likely Sunny Cove) core alongside four “Small CPU” (ATOM?) cores, with the development board on show offering PCIe support for M.2, UFS storage support as well as SIM card connectors, which suggests that this product is designed for future mobile devices. 
  

Intel shows of x86 CPU with big.LITTLE core design  

Intel’s tiny Hybrid x86 processor was designed to offer standby power consumption levels of 2mW, though at this time it is unclear whether or not this early processor design will ever make it into a shipping product. 

When speaking to members of the press at the architecture day, Intel was clear that their Fovoros technology was in its infancy, making it unlikely that we will see processors based on this design approach anytime soon, though we will definitely be seeing more from Intel’s 3D die stacking technology over the coming years.

big.LITTLE processor designs are not new, but they are undoubtedly best suited for the mobile market, where power is a premium currency, especially given the consumer demand for longer battery lives and slimmer products. Does Intel plan to challenge ARM again in the ultra-low-power processor market?

You can join the discussion on Intel’s x86 big.LITTLE processor design on the OC3D Forums. Â