PCI-SIG launches PCIe 6.0 version 0.9 – PCI Express 6.0 is on track for a 2021 launch

PCI Express 6.0 remains on track for a 2021 launch

PCI-SIG has confirmed that version 0.9 of the PCIe 6.0 standard has been released to their members, the proposed final draft of the specifications behind the next generation of PCI Express. No functional changes are due to be made to the standard before its final 1.0 release, which is due later this year.   

While PCIe 4.0 remains the new hotness in the PC market, hardware enthusiasts should know that PCI-SIG, the organisation behind the standard, has plans to bring the performance of its interconnection standard to new heights. The PCIe 5.0 standard has already been ratified, and a full PCIe 6.0 specification is due to be released this year. PCIe 5.0 is due to start appearing on motherboards this year, and the industry is already looking at what’s next for PCI Express.

PCIe 6.0 will become the new target for PC interconnectivity, packing a 2x increase in transfer speeds over PCIe 5.0, a 4x boost in raw bit rate over PCIe 4.0 and a whopping 8x improvement over what PCIe 3.0 can deliver. For context, that allows a single PCIe 6.0 lane to offer users as much bandwidth as a PCIe 3.0 8x lane configuration, which is more than enough bandwidth for many of today’s graphics cards.

PCIe 6.0 has met all its design requirements and has exceeded industry expectations in some regards. Even so, a final review pass is needed before PCI Express 6.0 can become a real-world standard. 

In terms of raw SSD performance, PCIe 3.0 NVMe storage devices can achieve 3.5 GB/s sequential read speeds using four PCIe lanes. With PCIe 4.0, the latest SSDs can deliver sequential speeds that exceed 7 GB/s. With PCIe 6.0, M.2 SSDs with four PCIe lanes could potentially reach speeds above 28 GB/s. That’s an irresponsible level of performance by today’s standards, but that’s what PCIe 6.0 could offer consumers.

Below is what Al Yanes, the President and Board Chair of PCI-SIG had to say about PCIe 6.0’s latest draft specification. 

 

    I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express specifications while maintaining backwards compatibility. Thanks to the hard work and dedication of the technical members of our protocol and electrical workgroups, we were able to reach this achievement two years after we announced the PCIe 6.0 specification in June 2019.

The PCIe 6.0 specification, version 0.9 is the final draft of the specification wherein members perform internal reviews of the technology for their essential patents. No additional functional changes are expected during this time.

 

  

With PCIe 6.0, PCI-SIG will add a new form of error correction called Forward Error Correction (FEC), which will help to improve the reliability of PCIe 6.0 and help to increase the standard’s bandwidth efficiency. Combine this with PAM4 signalling and PCIe 6.0 is due to deliver the bandwidth requirements of the standard with ease.

PCIe 6.0 is designed to meet the needs of future devices within the PC and enterprise markets, with Machine Learning, Artificial Intelligence, cloud computing and data storage being primary concerns for the industry. With 800G Ethernet cards coming this year and even faster standards being on the horizon, faster PCIe interconnects will become vital for the industry moving forward.

With PCIe 6.0, PCI-SIG plans to meet the performance needs of the industry while doing so at a low cost. The backwards compatibility of the standard will also be useful for many markets, as it allows some older hardware to be maintained within newer networks.

Below is a brief overview of the PCIe 6.0 standard in its current form.

PCIe 6.0 Specification Features

– Delivers 64 GT/s raw bit rate and up to 256 GB/s via x16 configuration
– Utilises PAM-4 (Pulse Amplitude Modulation with four levels) encoding and leverages existing 56G PAM-4 in the industry
– Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
– Maintains backwards compatibility with all previous generations of PCIe technology

PCIe 6.0 is a standard that hasn’t been finalised, but PCI-SIG plans to ratify and release the standard later this year; around two years after the release of PCIe 5.0. It typically takes two to three years for PCIe standards to make it into the PC market, making it probable that we will start seeing PCIe 6.0 compliant PCs in 2023 or 2024. 

  

To put the performance of PCIe 6.0 into context, it could enable M.2 devices to deliver speeds that are up to eight times faster than today’s Samsung 970 Pro series SSD, or four times faster than Samsung’s 980 Pro. These drives are widely regarded as some of the best performing PCIe 3.0/4.0 M.2 SSDs on the market. Another way to put it is with PCIe 6.0, the performance of a PCIe 3.0 16x configuration is equivalent to two PCIe 6.0 lanes. 

PCIe 6.0 will enable higher levels of bandwidth for those who need it while granting PC users access to today’s bandwidth levels over fewer PCIe lanes. The only problem with this rapid evolution is that new PCIe 4.0 devices will soon find themselves replaced with PCIe 5.0 and then PCIe 6.0 over the next 5 or so years. That said, should we complain about technology progressing too quickly? 

You can join the discussion on PCI-SIG’s soon to be finalised PCIe 6.0 standard on the OC3D Forums.