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AMD sheds light on the future of Ryzen - V-Cache, Zen 4 and more

AMD plans to release V-Cache enhanced processors

AMD's bringing the 3D packaging revolution to gamers, and it is transformative

AMD sheds light on the future of Ryzen - V-Cache, Zen 4 and more

AMD has shed some more light on their newly announced 3D V-Cache technology, confirming that the company plans to commercialise the technology with new Zen 3-based Ryzen processors. 

It was previously confirmed that AMD would be manufacturing new Ryzen processors that utilise their V-Cache technology in late 2021, suggesting that AMD plans to release new V-Cache enabled Zen 3 Ryzen processors in early 2022. 

Regarding Zen 4, AMD has been clear that Zen 4 is launching in 2022, but given AMD's launch plans for new Zen 3-based V-Cache enabled processors, it is probable that Zen 4-based Ryzen processors will not be released until late 2022, probably Q4. 

What is V-Cache? Why is it so special? 

AMD's V-Cache is an optimised stack of SRAM that AMD has stacked on top of their existing L3 cache on their Ryzen 5000 series CPUs, effectively tripling the cache size of AMD's latest Ryzen processors. 

In its current implementation, AMD's V-Cache is a 64MB layer of SRAM that has been created using TSMC's optimised  7nm SRAM libraries. This layer is connected to AMD's Zen 3 CPU chiplet using Through -Silicon-Vias (TSVs), which could allow AMD to create higher L3 Cache stacks should they desire to do so. AMD's V-Cache stack has 64MB of memory on board, and this chiplet sits on top of AMD's existing L3 Cache. This means that this new cache is not sitting on top of any hot spots on AMD's Zen 3 chiplets, alleviating potential thermal concerns. 

Having more L3 Cache allows AMD to have more data on-chip, allowing AMD's Zen 3 CPU cores to access important data faster and with higher levels of memory bandwidth. This change will be transformative for some workloads, as having more data on-chip will allow man calculations to be made faster and without any unnecessary delays. 

Using their V-Cache technology, AMD has taken a Zen 3 chiplet with 32MB of L3 Cache and have upgraded it to feature 96MB of L3 cache. This additional cache will not add much in the way of latency over Zen 3's on-chip cache and not have a huge impact on Zen 3's power consumption. 

AMD sheds light on the future of Ryzen - V-Cache, Zen 4 and more

 
V-Cache - A transformative technology for gamers

AMD's Computex tech demo showcased performance gains as large as 25% when using a Ryzen 5000 series prototype processor with V-Cache, highlighting how V-Cache can transform Ryzen's gaming performance. 

Most gaming workloads are cache-sensitive, and having access to 3x as much L3 cache allows games to keep more data on-chip and rely on DRAM-based data less often for critical calculations. This allows AMD's latest Zen 3 CPU cores to be fed data at a faster rate, enabling higher framerates by lowering the amount of time that CPU cores need to wait on DRAM for data. 

V-Cache is a technology that could make AMD's enhanced Zen 3 processors the strongest gaming CPUs on the market. That said, Intel also has new CPUs on the horizon, ad it remains to be seen how well these processors perform under gaming workloads. 

Is V-Cache AMD's Answer to Alder Lake? 

Intel plans to release their Alder Lake series of processors in Q4, around the same time that AMD will be manufacturing their first V-Cache enhanced processors. 

Consumers should expect AMD to start discussing their upcoming V-Cache enabled processors to distract them from Intel's upcoming Alder Lake launch, highlighting V-Cache's benefits during gaming workloads. With an expected launch in Q1 2022, Intel's Alder Lake will not just have to beat Zen 3, they will need to beat AMD's V-Cache enhanced Zen 3 CPUs. 

While AMD's V-Cache will only benefit AMD during Cache-sensitive workloads, it cannot be underestimated how important gaming is to the DIY PC market. 

AMD's bringing the 3D packaging revolution to gamers, and it is transformative

The Future of V-Cache

V-Cache will be AMD's first use of TSMC's 3D Fabric technology, which could be used in the future to make more elements of AMD's processors three-dimensional in nature. In this regard, the possibilities of 3D packaging technologies are endless, being limited only by the creativity of AMD. 

Regarding V-Cache, AMD has confirmed that their current V-Cache prototype only uses a single layer of cache that is 64MB in size. It is possible that AMD could stack these dies on top of each other to create CPUs with even larger amounts of L3 cache. A hypothetical 8-layer cache stack would give AMD chips 512MB of additional L3 cache, which would be an insane add-on for any processor. This could open a lot of doors for AMD within niche markets, where this level of acceleration would be beneficial. 

In early 2022, we expect AMD to bring V-Cache enhanced Zen 3 processors to market, countering Intel's Alder Lake CPU launch. In Late 2022, AMD will be moving to Zen 4, and this shift should also see AMD move to their new AM5 CPU socket and DR5 DRAM. We expect to hear more about AMD's hardware roadmap later this year. 

You can join the discussion on AMD's future plans for Ryzen on the OC3D Forums.


AMD's bringing the 3D packaging revolution to gamers, and it is transformative

 

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Most Recent Comments

02-06-2021, 22:44:51

NeverBackDown
They are using TSMCs SoIC technology, System on Integrated Chip, that they currently showcased at 12 layers maximum. This is as stated obviously what AMDs V Cache is based on and I believe AMD said they won't be going more than 2 layers right now. If they went the full 12 in the future or for say Epyc Scale CPUs, they could add 768MB of cache and for that application, would be completely insane. Intel would have nothing on that.

This is an ingenious move by TSMC to get this technology into existence and an even smarter move on AMDs part to take advantage of it and make it work so well with their chiplet future. They can really take this to the next level in the future. Should really help their IPC gains as we get towards smaller and smaller nodes(and less IPC gains from them).Quote
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