Early benchmarks of AMD's Zen 4 EPYC processors point towards a huge L2 Cache upgrade

Will this enlarged L2 cache have a big impact on performance?

Early benchmarks of AMD's Zen 4 EPYC processors point towards a huge L2 Cache upgrade

It looks like Zen 4 CPUs will feature more than 2x as much L2 cache as their predecessors

A new AMD processor has appeared on Geekbench, an engineering sample that appears to use Zen 4 cores in a test platform that AMD has called "Quartz". This processor has 32 cores and 64 threads, has a base frequency of 1.2GHz, and appears to have a significant cache upgrade over AMD's current-generation Zen 3 chips.

While this engineering sample appears to have 32MB of L3 cache per 8-core CPU chiplet (just like standard Zen 3 chips), AMD's Zen 4 engineering sample appears to feature 1MB of L2 cache per core. This is two times as much L2 cache as a Zen 3 CPU core. That's a big upgrade.

Prior leaks (source) from an early Zen 4 Ryzen chip have already showcased that AMD's next-generation Zen cores will feature this enlarged cache size. However, this new Geekbench leak acts as further validation that Zen 4 will offer PC users enlarged per-core cache sizes.

Why is Cache important?

A CPU's cache allows important data to be stored on-chip, allowing information to be transferred to CPU cores at high speeds and low latencies, enabling computation to start almost instantly and for CPUs to spend little to no time idling. Having larger on-chip caches allows more data to be accessed in this way, accelerating workloads that benefit from fast data access times.

Without large enough on chip caches, data will need to be accessed from memory. This is where your system's DRAM comes into play. DRAM is much slower than on-CPU caches, and takes a lot more time to access. Accessing data from memory takes time, and during this time your CPU may be wasting clock cycles waiting for data. With larger on-chip caches, some workloads benefit from having more of its data on cache, resulting in significant increases in system performance. 

On CPU caches are separated into multiple categories, with L1, L2 and L3 caches being common. Lower level caches, like L1 and L2 caches, are typically caches for individual CPU cores, offering more bandwidth and lower latencies than larger, higher level caches like L3. AMD's enlarged L2 caches with Zen 4 will allow more data to be stored on-core, accelerating many workloads. That said, not all workloads will benefit from this L2 cache upgrade. 


Early benchmarks of AMD's Zen 4 EPYC processors point towards a huge L2 Cache upgrade

If Zen 4's increased L2 cache size leak is accurate, AMD's next-generation architecture aims to deliver increased performance by continuing to enhance the performance and size of Ryzen's cache structure. With a larger L2 cache, AMD should be able to reduce much of the idle time on their Zen cores and use that to increase their throughput. Assuming that Zen 4's L2 cache isn't more latent than Zen 3's (as larger caches can often come with larger latencies), this design enhancement will be hugely beneficial for Zen 4, though the impact of this change will be different on a case-by-case basis. 

Zen 4's enlarged L2 cache is one of the many architectural improvements that AMD will deliver with their next-generation x8 architecture. Like Zen 3, AMD plans to improve their architecture with Zen 4 in a number of ways to deliver widespread performance benefits across a wide range of workloads.

AMD has already confirmed that they are creating Zen 4 Genoa and Zen 4c Bergamo processors to cater their Zen 4 architecture to specific workloads. With Zen 4, AMD will be targeting generalised workloads, whereas with Zen 4c, AMD appears to be optimising their cache hierarchy while increasing their CPU core counts to create an optimised x86 core for cloud-focused workloads. 

Early benchmarks of AMD's Zen 4 EPYC processors point towards a huge L2 Cache upgrade

What else do we know about Zen 4? 

AMD plans to release Zen 4 Ryzen and EPYC processors in the second half of this year. These CPUs will be built using TSMC's HPC optimised 5nm lithography technology, which has the potential to deliver a 2x increase in density, a 2x increase in power efficiency, and a greater than 1.25x increase in performance.

AMD's Zen 4 Ryzen and EPYC platforms will support DDR5 memory and PCIe 5.0 connectivity. For AMD's Zen 4 Ryzen 7000 series chips, has already showcased a CPU that had all of its cores running at 5GHz, suggesting that Zen 4 will deliver PC builders both clock speed increased and boosted IPC. Not only will Zen 4 Ryzen chips feature architectural enhancements, they will also run faster.

Zen 4's leaked L2 cache size increased are just part of what AMD has planned for Zen 4. We expect AMD to discuss Zen 4 in more detail in the near future. 

You can join the discussion on AMD's Zen 4 EPYC processors on the OC3D Forums.

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