AMD has confirmed that Vega utilises their new Infinity Fabric tech

AMD has confirmed that Vega utilises their new Infinity Fabric tech

AMD confirms that Vega utilises Infinity Fabric

AMD has confirmed that Vega utilises their new Infinity Fabric tech


Vega offers a new beginning for AMD's Radeon Technologies group, bringing with it a revolutionary new design that will no doubt greatly improve companies standing in both the consumer and professional GPU markets.
One of Vega's most interesting features is the use of AMD's new Infinity Fabric technology, which will open AMD up to a lot of interesting new design possibilities, especially when creating multi-die GPUs.  
Vega is more than just an improved version of AMD's Polaris architecture, coming with a new caching structure, geometry pipeline, rasterization techniques and more. AMD's Raja Koduri has recently confirmed that Vega has required a lot of changes on the driver side to make the best use of Vega's new capabilities, much more than what would be required for an improved polarised design.  

Today we will be discussing the potential of AMD's Infinity Fabric and how the technology applies to both CPUs and GPU and what effect it will have on AMD's future products. 


AMD confirms that Vega utilises Infinity Fabric  

In simple terms, AMD's Infinity Fabric is a low-latency, high bandwidth interconnect that will allow AMD to connect hardware modules together, be it on a silicon level or as an interconnect between different chips.  

Today we see Infinity Fabric connect chips within the same piece of silicon, like the two 4-core modules in the Ryzen 7 1800X, dies on a single chip like AMD's EPYC server products (see image below) and to connect dual EPYC CPUs within a single server. This shows exactly how flexible AMD's Infinity Fabric can be, allowing the company to join compute engines together in ways that were almost impossible before.

Vega is the first AMD GPU to utilise the companies Infinity Fabric technology, with AMD using this tech as the basis of all their future ASIC (application-specific integrated circuit) designs moving forward. This will make the creation of future APUs and other custom SoCs much easier in the future though it also offers some interesting possibilities for multi-die GPUs.   

While Raja Koduri does not explicitly mention any multi-die GPU designs during the AMA, though he does admit that it is possible. 

Previously Raja Koduri has stated that the with changes to Moore's Law and the sheer difficulty of manufacturing large GPU products that the industry needed to "get past Crossfire" and that the "economies of the smaller die" would become much more important. 

With Infinity Fabric, AMD could potentially bring together several smaller GPU dies to create a larger flagship product, similar to how AMD's EPYC server products use an Infinity Fabric based Multi-Chip-Module (MCM) to create their 32-core Naples/EPYC flagship out of four 8-core CPU dies. 


Infinity Fabric allows us to join different engines together on a die much easier than before. As well it enables some really low latency and high-bandwidth interconnects. This is important to tie together our different IPs (and partner IPs) together efficiently and quickly.

It forms the basis of all of our future ASIC designs.

We haven't mentioned any multi-GPU designs on a single ASIC like Epyc, but the capability is possible with Infinity Fabric.


In manufacturing silicon dies, size is a huge factor. In every silicon wafer there will be defects and when manufacturers make larger chips these defects will harm an ever larger proportion of the chips produced, harming production yield in the process. 

Imagine that in a silicon wafer that there are 10 major defects and that when making a small chip that you create 180 dies per wafer, this will result in 10 faulty chips and a failure rate of 5%. Then imagine that you are creating a larger chip and you only get 60 dies per wafer, resulting in the same 10 faulty chips and a failure rate of 16%. These numbers are just for illustration purposes and are not to be taken as actual yield rates at a foundry, but it does illustrate the reason why larger dies are more prone to having faults and therefore suffer from lower yields than silicon with smaller die sizes.  

When it comes to die sizes there are also other factors to consider, like the fact that silicon wafers are circular. You can only fit a certain number of square sides within a circle and larger dies will result in additional wasted space at the edges of a silicon wafer. This again reduces the number of dies per wafer and will increase the price of each chip in a wafer. 

When considering this, creating large products using several dies in a Multi-Chip-Module makes a lot of sense, as the yields of your individual chips will be much higher and the overall cost of the end-product is reduced. In the case of AMD's EPYC CPUs, this should allow AMD to easily offer their products with competitive pricing when compared to Intel's larger-die counterparts, while also maintaining high-profit margins.  

The key here is to have these multi-chip-modules act like a single unified product without much/any performance noticeable degradation, though in this regard AMD's Infinity Fabric has shown some impressive results so far. 


AMD confirms that Vega utilises Infinity Fabric(Will AMD eventuially create GPU MCMs like their EPYC CPUs?)  


If AMD can connect several GPU dies using Infinity Fabric they will effectively be able to create multi-GPU products that can be seen by games and other software as a single, unified product, negating the need for games to feature Multi-GPU/Crossfire support. 

At this time it is unknown what AMD's plans are for Infinity Fabric on GPUs, or how well this new technology will allow multi-chip modules to scale on the GPU side. It will certainly be interesting to see how this technology develops, as it is certainly shown impressive results on the CPU side. 


You can join the discussion on the use of Infinity Fabric on AMD's new Vega GPUs on the OC3D Forums


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Most Recent Comments

19-05-2017, 14:02:51

This article hits on something I've always wondered.
Why present a dual GPU card as dual GPU's to the system vs having the card manage it's own information tasking.

Maybe we will see a future GPU review with a chip looking like TTL's 100 fan AIO review.

'Enthusiasts will need to plan ahead with this GPU measuring in at 1500mm'.

In all seriousness though, fantastic idea! If the interconnects worked super well, maybe we could see a 'budget' monster GPU with larger process node sizes with a bunch of less expensive cores?

That multi-module approach sure would be more interesting for load distribution / power savings with GPU 'core parking/gating'?.Quote

19-05-2017, 15:26:48

This was not surprising whatsoeverQuote

19-05-2017, 15:28:16

They had good idea with developing infinity fabric. With creating large dies becoming a problem multi die single units are probably the direction in which will future tech go.Quote

19-05-2017, 16:01:52

Why has Buzz Lightyear suddenly entered my thoughts Quote

19-05-2017, 16:16:16

Navi = scaleable.Quote

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