'

PCIe 6.0 remains on track for a 2021 launch, delivering breakthrough bandwidth for future devices

Expect doubled data rates over PCIe 5.0

PCIe 6.0 remains on track for a 2021 launch, delivering breakthrough bandwidth for future devices

PCIe 6.0 remains on track for a 2021 launch, delivering breakthrough bandwidth for future devices

PCI-SIG has confirmed that version 0.7 of the PCIe 6.0 standard has been released to the organisation's members, bringing the high bandwidth interconnect one step closer to widespread adoption. 

While PCIe 4.0 remains the new hotness in the PC market, hardware enthusiasts should know that PCI-SIG, the organisation behind the standard, plans to bring the performance of its interconnection standard to new heights. The PCIe 5.0 standard has already been ratified, and full PCIe 6.0 specification is due to be released in 2021. 

PCIe 6.0 will be the new hotness when it comes to PC interconnectivity, packing a 2x increase in transfer speeds over PCIe 5.0, a 4x boost in raw bit rate over PCIe 4.0 and a whopping 8x improvement over what PCIe 3.0 configuration can deliver. For context, that allows a single PCIe 6.0 lane to offer users as much bandwidth as a PCIe 3.0 8x lane configuration, which is more than enough bandwidth for most of today's graphics cards.  

Right now, PCIe 6.0 has met most of the design requirements of the standard and has exceeded expectations in some regards. Even so, improvements still need to be made with regards to power consumption, though the addition of a new L0p power state should address these complaints.  
 

PCI-SIG's PCIe 6.0 spec is due to launch in 2021 - 4x bandwidth boost over PCIe 4.0


With PCIe 6.0, PCI-SIG will add a new form of error correction called Forward Error Correction (FEC), which will help to improve the reliability of PCIe 6.0 and help to increase the standard's bandwidth efficiency. Combine this with PAM4 signalling, and PCIe 6.0 is due to deliver the bandwidth requirements of the standard with ease. 


PCIe 6.0 is designed to meet the needs of future devices within the PC and enterprise markets, with Machine Learning, Artificial Intelligence, cloud computing and data storage being primary concerns for the industry. With 800G Ethernet cards coming this year, and even faster standards being on the horizon, faster PCIe interconnects will become vital for the industry moving forward. 

With PCIe 6.0, PCI-SIG plans to meet the performance needs of the industry while doing so at a low cost. The backwards compatibility of the standard will also be useful for many markets, as it allows some older hardware to be maintained withing newer networks. 

Below is a brief overview of the PCIe 6.0 standard, in its current form.

PCIe 6.0 Specification Features

- Delivers 64 GT/s raw bit rate and up to 256 GB/s via x16 configuration
- Utilises PAM-4 (Pulse Amplitude Modulation with four levels) encoding and leverages existing 56G PAM-4 in the industry
- Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
- Maintains backwards compatibility with all previous generations of PCIe technology


PCI-SIG's PCIe 6.0 spec is due to launch in 2021 - 4x bandwidth boost over PCIe 4.0

  
Right now, PCIe 6.0 is a standard is in its planning stages, with PCI-SIG planning to ratify and release their full standard in 2021, two years after the release of PCIe 5.0. In the PC space, it typically takes two-three years for PCIe standards to make it into the PC market, making it probable that we will start seeing PCIe 6.0 compliant PCs in 2023 or 2024. 

PCIe 6.0 remains on track for a 2021 launch, delivering breakthrough bandwidth for future devices  

To put the performance of PCIe 6.0 into context, it could enable M.2 devices to deliver speeds that are up to eight times faster than today's Samsung 970 Pro series SSD, which is widely regarded as one of the best performing PCIe 3.0 M.2 SSDs on the market. Another way to put it is with PCIe 6.0, the performance of a PCIe 3.0 16x configuration is equivalent to two PCIe 6.0 lanes. 

PCIe 6.0 will enable higher levels of bandwidth for those who need it while granting PC users access to today's bandwidth levels over fewer PCIe lanes. The only problem with this rapid evolution is that new PCIe 4.0 devices will soon find themselves replaced with PCIe 5.0 and then PCIe 6.0 over the next 5 or so years. That said, should we complain about technology progressing too quickly? 

You can join the discussion on PCI-SIG's upcoming PCIe 6.0 standard on the OC3D Forums

«Prev 1 Next»

Most Recent Comments

04-11-2020, 08:21:55

Kleptobot
Take that! PCB layout engineers.

Seriously though, signal integrity for these lanes is going to be a nightmare. Crosstalk and transmission everywhere.

PCIe 4 was already struggling to be routed any meaningful distance without the need for retimers.Quote

04-11-2020, 11:18:42

NeverBackDown
Signal integrity will be similar to 5.0

Most of these uses will come from on die transmission. Consumers won't use or see this stuff for a long time outside of on die stuff. No need for it.Quote

04-11-2020, 11:27:11

tgrech
Might be an area where it's adopted in mobile before PCs, biggest benefits initially would probably be reducing the number of lanes (and therefore amount of power) required for storage & IO on battery devices, particularly tablet/phone SoCs which almost always have just 1 or 2 lanes for power reasons.Quote
Reply
x

Register for the OC3D Newsletter

Subscribing to the OC3D newsletter will keep you up-to-date on the latest technology reviews, competitions and goings-on at Overclock3D. We won't share your email address with ANYONE, and we will only email you with updates on site news, reviews, and competitions and you can unsubscribe easily at any time.

Simply enter your name and email address into the box below and be sure to click on the links in the confirmation emails that will arrive in your e-mail shortly after to complete the registration.

If you run into any problems, just drop us a message on the forums.