AMD’s Zen CPU roadmap leaks, detailing their Zen 5 and Zen 6 core designs
AMD x86 CPU roadmap leaks, detailing the company’s Zen 5 and Zen 6 CPU core designs
In the newest YouTube video from Moore’s Law is Dead, two internal AMD slides were leaked that detailed the company’s x86 CPU plans. Specifically, these slides detail plans for new AMD Zen 5 and Zen 6 CPU cores. The CPU cores will power AMD’s Ryzen 8000 series and Ryzen 9000 series of processors.
These AMD slides are not intended for public consumption. As such, we should not take AMD’s listed dates too seriously. That said, these slides to corroborate with rumours that have suggested that AMD plans to reveal Zen 5 in early 2024 at CES.
With Nirvana, AMD’s Zen 5 CPU core design, AMD aims to achieve IPC gains that are above 10-15%. Based on AMD’s planned changes for Zen 5, AMD are planning to increase the power efficiency of their CPU cores, offer a larger data cache, and add new FP-512 features to their core design. AMD Zen 5 CPUs are to use 4nm/3nm silicon.
Moore’s Law is Dead has stated that AMD’s planned changes for Zen 5 should dramatically increase the AVX performance of their new processors. This alone should result in much higher Cinebench scores for Zen 5, which is great news for AMD’s marketing efforts given Cinebench’s popularity. This is backed up by other recent AMD’s Ryzen 8000 leaks. This leak also points towards large Cinebench performance gains for Zen 5.
With Zen 5, AMD expects to offer users new 16-core complexes. This core complex is likely for Zen 5c CPU cores, with their performance-oriented Zen 5 CPU cores remaining limited to 8-core complexes. With Zen 5, AMD has the option to release AM5 processors with up to 16 Zen 5 cores. Alternatively, AMD can release CPUs with 8 Zen 5 cores and 16 Zen 5c cores, or 32 Zen 5c cores. Like Intel, AMD could go hybrid with their Ryzen 8000 series of processors.
With Zen 6, AMD are targeting 10+% IPC gains over Zen 5. Zen 6 CPU should use 3nm/2nm silicon and move to a new multi-die structure. This new structure will see AMD fully embrace die stacking.
Zen 6 could see AMD stack CPU cores on top of an I/O die. This change should dramatically decrease the latency of AMD’s processor designs. This will be thanks to a new Infinity Fabric from AMD, and AMD’s use of fast silicon interconnects. AMD are reportedly aiming for monolithic performance from chiplet-based designs. This could have huge ramifications for latency sensitive workloads, like gaming.
With Zen 6, AMD plans to offer CPU core complexes with up to 32 total cores. These 32-core clusters will likely use Zen 6c CPU cores. This paves the way towards huge Zen 6 EPYC processors.
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