AMD discusses 7nm Zen 2 and Next-Generation EPYC

AMD discusses 7nm Zen 2 and Next-Generation EPYC

AMD discusses 7nm Zen 2 and Next-Generation EPYC 

The time has come, AMD has finally started to release information about their 7nm Zen 2 CPU architecture, revealing a radically new CPU design for EPYC as well as significant changes to AMD’s Zen processor microarchitecture, which are designed to increase their performance per clock and offer increased performance per watt. 

For starters, let’s talk 7nm, which offers a 2x increase in transistor density when compared to 14nm, while also offers a 50% power reduction when used at the same clock speeds or a 25% speed increase with the same power consumption levels as 14nm, and that doesn’t include the changed that will be delivered by Zen 2’s enhanced design. 

On the core side, Zen 2 offers a redesigned execution pipeline, featuring an improved branch predictor, a re-optimised instruction cache, better instruction pre-fetch and a larger Ops Cache, all of which will help increase Zen 2’s IPC (performance per clock). 

Zen 2 will also offer double the floating point performance of Zen, supporting 256-bit floating point calculations, which is a major stride for AMD, as AVX support is a strong point for Intel processors. AMD also promises stronger mitigations for Spectre, as well as support for what AMD calls 2nd Generation Infinity Fabric.

Sadly, AMD didn’t discuss performance numbers for Zen 2, though with what AMD has disclosed we can expect increased AVX performance, higher clock speeds at each stage of the power envelope and increased performance per clock in certain workloads.   
And now for Zen 2’s BIG changes, especially on the EPYC side. The image below showcased a mock-up for Zen 2 EPYC, which seeming features eight memory channels, just like today’s EPYC processors. What you will see below is that Zen 2’s design is more modular than Zen. with I/O and CPU cores sitting on separate dies, allowing I/O silicon to be created on low-cost 14nm technology while focusing their CPU designs on high-density/high-performance 7nm silicon. 

In AMD’s mock-up, they have two 7nm CPU core “Chiplets” that are connected to a single 14nm I/O die, though at this time it is unknown how many CPU Chiplets Zen 2 EPYC will support or how many CPU cores will be supported on each Chiplet. This is a revolutionary design for a CPU, and could address the memory locality issues that are seen in today’s EPYC and Threadripper processors. 

Looking at this slide we can see eight infinity symbols on the 14nm die, which could be seen as a hint that AMD plans to connect eight separate CPU chiplets to their Zen 2 EPYC I/O die. If this is true, eight 8-core Zen 2 chiplets would give Zen 2 EPYC a maximum core count of 64. 

Update – AMD has confirmed that Zen 2 EPYC processors will offer a maximum core count of 64 per socket and that they will use eight CPU dies that offer eight cores each to achieve this feat. 

AMD discusses 7nm Zen 2 and Next-Generation EPYC 

Looking into the future, AMD expects 7nm Zen 3 to release in 2020 and states that “Zen 4” is “In Design” stating that the company has an “aggressive roadmap”.  

You can join the discussion on AMD’s 7nm Zen 2 architecture and Next-Generation EPYC on the OC3D Forums.