Intel, AMD, and EAG boosts x86 with new improvements

Intel, AMD and the x86 Ecosystem Advisory Group have finalised a wave of new tech improvements

Last year, AMD and Intel joined forces to create the x86 Ecosystem Advisory Group, aiming to streamline ISA features and increase x86’s competitiveness against ARM and RISC-V. Now, the group is celebrating its 1st anniversary with a suite of new standardised features, which will be available as part of future x86 CPUs from both AMD and Intel.

With FRED (Flexile Return and Event Delivery), AMD and Intel seek to deliver reduced latencies and increased software reliability with a “modern interrupt model”. With AVX10 and ACE, both companies seek to deliver a standardised way of accelerating several workloads, preventing ISA fragmentation. This plan avoids the issues that faced the AVX-512 instruction set. AVX-512 is not available on all CPUs, and some instructions were only available on specific CPUs. With standardised support across AMD and Intel, software developers can adopt these new instructions with certainty that of hardware support moving forward.

With ChkTag, the x86 ESG plans to enhance “memory safety” by enabling memory-safety bugs to be detected in hardware. This can allow software developers to create safer applications and avoid vulnerabilities related to buffer overflows and use-after-free errors. The beauty of this feature is that the software will still work with older, unsupported CPUs, enabling a smooth transition for the feature.

Standardizing x86 features

Key technical milestones, include:

• FRED (Flexible Return and Event Delivery): Finalized as a standard feature, FRED introduces a modernized interrupt model designed to reduce latency and improve system software reliability.
• AVX10: Established as the next-generation vector and general-purpose instruction set extension, AVX10 boosts throughput while ensuring portability across client, workstation, and server CPUs.
• ChkTag: x86 Memory Tagging: To combat longstanding memory safety vulnerabilities such as buffer overflows and use-after-free errors, the EAG introduced ChkTag, a unified memory tagging specification. ChkTag adds hardware instructions to detect violations, helping secure applications, operating systems, hypervisors, and firmware. With compiler and tooling support, developers gain fine-grained control without compromising performance. Notably, ChkTag-enabled software remains compatible with processors lacking hardware support, simplifying deployment and complementing existing security features like shadow stack and confidential computing. The full ChkTag specification is expected later this year – and for further feature details, please visit the ChkTag Blog.
• ACE (Advanced Matrix Extensions for Matrix Multiplication): Accepted and implemented across the stack, ACE standardizes matrix multiplication capabilities, enabling seamless developer experiences across devices ranging from laptops to data center servers.

– AMD

(The founding members of the x86 Ecosystem Advisory Group)

Intel and AMD want to leverage the ESA to secure the future of x86

Moving forward, Intel and AMD seek to add more “strategic ISV partners” to their Ecosystem Advisory Group. Furthermore, they want to evaluate new extensions that can give customers “demonstrable advantages”. In other words, AMD and Intel want extensions that the industry will adopt quickly. They don’t want to waste silicon on features that go unused. By delivering features that the industry adopts, x86 will gain advantages over competing instruction set architectures (ISAs). Ultimately, this will benefit AMD and Intel.

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