Samsung reveals the industry’s first Power Management chips for DDR5 modules

Samsung reveals the industry's first Power Management chips for DDR5 modules

Samsung reveals the industry’s first Power Management chips for DDR5 modules

DDR5 will bring many changes to the memory market; and one of the most significant technological shifts is the standard’s use of integrated power management, which moves power regulation away from motherboards and directly onto DRAM modules. 

Motherboard makers will no longer have the same level of control over DRAM power as they had before, allowing DRAM modules to control their own power draw, deliver stronger levels of signal integrity and prevent power wastage wherever possible. 

Samsung has revealed what they call “the industry’s first integrated power management ICs (PMICs)” for DDR5 memory, S2FPD01, S2FPD02 and S2FPC01 chips. These DDR5 PMICs are designed to helo DDR5 memory modules reach their full potential by utilising a “ high-efficiency hybrid gate driver and a proprietary control design”. 

By moving memory power management directly onto DRAM modules, DRAM manufacturers will no longer have to rely on motherboard manufacturers to supply their modules with the correct power levels. This level of control should increase DDR5 module stability and reduce the complexity of motherboard power designs in the DDR5 era. 
 


   For improved performance efficiency and load-transient responses, Samsung’s new PMICs for DDR5 modules have been equipped with a high-efficiency hybrid gate driver and a proprietary control design (asynchronous-based dual-phase buck control scheme).

This scheme allows the DC voltage to step down from high to low with a fast transient response to changes in the output load current and adapts the conversion accordingly to efficiently regulate its output voltage at near-constant levels. The control scheme also features both pulse width and pulse frequency modulation methods, preventing delays and malfunctions when switching modes.

  
Samsung’s S2FPD01 and the S2FPD02 are designed for data centre and enterprise servers for low density and high-density DRAM modules, respectively, whereas their S2FPC01 chips are designed for desktop and laptops modules. Samsung has confirmed that their power ICs are currently being sampled to customers. However, at this time, it is unknown when these power management chips will be available in retail DDR5 memory modules. 

Samsung reveals the industry's first Power Management chips for DDR5 modules  
With DDR5, memory modules will control their own power, giving DRAM tighter control of their power usage and the ability to respond faster to higher memory loads and power draw changes. Output voltages can be controlled to “near-constant levels” with DDR5, making DDR5 much more stable than DDR5. 

You can join the discussion on Samsung’s PMIC chips for DDR5 memory modules on the OC3D Forums. 

Samsung reveals the industry's first Power Management chips for DDR5 modules