TSMC starts N2 volume production, starting its 2nm era

TSMC kickstarts N2 volume manufacturing, moving the company to Nanosheet technology

TSMC has confirmed it has begun volume production for its N2 (2nm) lithography node. Production is currently centered at TSMC’s Fab 22 in Kaohsiung, and is the company’s first “nanosheet” lithography node. This moves TSMC away from FinFET transistors, with TSMC promising a “full-node strife in performance and power consumption”.

AMD has confirmed that it will use TSMC’s 2nm node extensively in 2026. AMD confirmed that its next-generation Zen 6 “Venice” CPUs will utilise the node. Furthermore, AMD has confirmed that its upcoming MI450 AI accelerators will also use TSMC N2 silicon.

Compared with TSMC’s N3E chips, N2 promises a 10-15% speed increase at the same power consumption. Alternatively, users can achieve a 25-30% reduction in power draw at the same speeds. In other words, N2 is TSMC’s most performant and efficient lithography node to date. TSMC’s 2nm node also boasts 15% higher chip density than N3E.

Moving forward, TSMC is already developing an enhanced N2P node. Volume production for N2P chips is expected to start in the second half of 2026. N2P will feature improved performance and efficiency levels compared to N2.

Further along TSMC’s roadmap, the company plans to introduce A16 SPR, N2X, and A14 lithography nodes. A16 SPR is a 2nm-class node that will feature TSMC’s “Super Power Rail” technology. This tech is similar to Intel’s backside power delivery technology and will reportedly deliver speeds 8-10% higher than N2P at the same voltage or 15-20% lower power draw at the same performance levels.

2nm volume production has started at TSMC, and the company has no plans to slow down its silicon innovations.

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